The present invention relates to a process for improving the global flatness of semiconductor substrates using plasma assisted chemical etching. In particular, the present invention relates to a process for improving global flatness of semiconductor substrates by removing material from the back surface of a semiconductor substrate by plasma assisted chemical etching.
Conventional processes for thinning and figuring surfaces and films employ such methods as mechanical polishing, grinding, sputtering, sand blasting, and chemomechanical processes. Each of these processes usually have substantial processing limitations. Mechanical and chemomechanical processes for thinning semiconductor films are contact methods that leave contaminants on the surface and cause subsurface damage to the substrate. Also, conventional thinning processes do not allow corrections of the spatial variation of the film thickness across the substrate.
Plasma assisted chemical etching (PACE) methods to shape the surfaces of substrates are an improvement over the conventional processes such as chemomechanical thinning because such plasma processes do not contact the substrate surface, and therefore reduce the potential for subsurface damage. In the PACE process, a plasma generates a chemically reactive species from a gas such as sulfur hexafluoride and the surface of the substrate facing the plasma etching electrode is etched or thinned at defined locations to improve the overall global thickness uniformity of the substrate. This type of etching has many applications in the semiconductor industry, including selective thickness reduction of the surface of semiconductor substrates to improve the global flatness of the substrate. A high degree of global substrate flatness is crucial for subsequent device fabrication steps.
It is well known in the art that a conventional plasma etching system for improving global flatness of a substrate typically has three major components. These components include a device to measure the thickness of the substrate at discrete points on the substrate, computational hardware and software to compute a thickness map of the substrate and required plasma electrode dwell time based on the individual thickness measurements, and material removal hardware to execute the plasma tool motion and make the substrate modifications based on the thickness map and dwell time generated.
During the conventional PACE process, the substrate being modified to improve global flatness is secured to a platform within a vacuum chamber which is in combination with a plasma reactor and electrode. The front side of the substrate utilized in subsequent device fabrication is facing upward toward the plasma electrode, and the back side of the substrate is in contact with and facing the platform. A feed gas is introduced into the plasma electrode, and the plasma generates chemically reactive species from the feed gas. The chemically reactive species interact with the substrate surface to form volatile by-products, which etch the surface of the substrate and reduce its thickness at each individual position etched. The plasma electrode is scanned over the surface of the substrate in relation to the thickness map for the substrate generated prior to the PACE step.
Although conventional PACE technology has many recognized advantages over other substrate thinning or flattening methods such as mechanical polishing or grinding, it is not without limitations. PACE processes currently utilized require that the substrate surface to be plasma etched be ultra-clean to prevent contaminant particles from causing masking problems during the PACE procedure and the subsequent formation of Light Channel Defects on the polished surface. Furthermore, the PACE process can itself introduce contaminants or artifacts onto the substrate surface such as byproducts from the etching reaction or scan lines from the scanning of the plasma. These etching artifacts may be difficult to remove from the substrate surface in subsequent processing steps.